1. Technical Field of the Invention
The present invention relates generally to electroluminescent (EL) display devices, and more particularly to an EL display device in which a predetermined voltage is periodically applied to the EL elements to make the applied potential difference substantially zero, thereby inhibiting dielectric breakdown.
2. Description of the Related Art
A conventional EL display device, such as that disclosed in Published Unexamined Japanese Application JPA-9-54566, includes an EL display panel having scan and data electrodes which are laid out in rows and columns. EL elements are formed at intersecting regions of the scan and data electrodes, thereby creating a matrix display. In this display, a scanning voltage is progressively applied from a scan-side driver IC to the scan electrodes, while a data voltage is applied to the data electrodes from a data-side driver IC. Luminescence/non-luminescence driving pulse voltages differing in polarity once per each of positive and negative fields are applied to the EL elements, which consequently emit or do not emit light in response thereto. Also, the display disclosed in the above-identified Japanese application is designed so that an offset voltage having a positive polarity is applied to the positive field scan electrodes to reduce the breakdown voltage of the scan-side driver IC.
In FIG. 7, some exemplary voltage waveforms characteristic of the above-discussed display are shown, including voltage waveforms of three successive scan electrodes 1, 2, 3 and a voltage waveform of one data electrode, as well as voltage waveforms between the scan electrode 1 and its associated data electrode.
In the positive field, a voltage shown by the solid line is applied to the scan electrode during application of a scan voltage, as well as in preceding and subsequent periods. Otherwise, the voltage is in a floating (high impedance) state shown by the dotted line.
In this case, when the data electrode outputs a light emission pulse (0V), the scan electrode is set in the high impedance state and the offset voltage Vm is applied to the EL elements. Subsequently, the offset voltage Vm applied to the EL elements becomes a DC voltage while the scan electrode is in the high impedance state.
In the negative field, when the data electrode outputs a light emission pulse (Vm), the scan electrode is set in the high impedance state, and the data voltage Vm is applied to the EL elements. Thus, a data voltage -Vm applied to the EL elements becomes a DC voltage when the scan electrode is in the high impedance state.
The EL elements of the above display are arranged so that each is structured from a light emission or "luminous" layer sandwiched between a pair of dielectric films.
However, the dielectric films can typically contain local defects. More specifically, unwanted particles are often deposited on or in the dielectric layers during formation thereof. As a result, the actual film-forming value of the layers is less than a target value. Although the particles are removed by brushing the layers during the formation process, the particles inherently leave behind tracks, or small indentations, in the respective surfaces of the layers.
Subsequently, when a pulse voltage is applied to the films to produce light emission, the resulting electric field is concentrated in the tracks, thereby increasing the potential for dielectric breakdown at these points.
As shown in FIG. 7, if a specified DC voltage is continuously applied at times other than when the light emission drive pulse voltage is applied, electrical discharge continues between the scan electrode and data electrode, as the pulse voltage forces a current to be continuously supplied thereto. This continued electrical discharge thereby increases the risk of further dielectric breakdown.